TSMC has announced a new process for 2026 that seems to be a direct attack on Intel. As we all know, Intel’s first Angstrom node is Intel 20A, to be followed by Intel 18A. In a move reminiscent of a disposable razor commercial, TSMC has announced a new process called “A16” for 2026—which, as you can see, has a lower number than Intel’s competing nodes. It will also be the first TSMC process to offer backside power delivery, which Intel will also deliver with its Angstrom nodes.
TSMC unveiled the A16 process at its North America Technology Symposium in Santa Clara this week. Notably, Intel has its headquarters in Santa Clara, so this is like TSMC standing on the company’s front lawn and yelling, “You want some of this?!” The A16 process will follow the company’s 2nm node and feature nanosheet gate-all-around (GAA) transistors along with backside power delivery, which it calls Super Power Rail architecture. TSMC says A16 will offer 8–10% more performance than N2P at the same power or enable a 15–20% reduction in power requirements with the same performance. It will also feature a 1.1x increase in density.
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