Lifeboat Foundation

Who said Moore’s Law was dead? Certainly not IBM or its chip partners Globalfoundries and Samsung. The trio has developed a transistor manufacturing process that should pave the way for 5-nanometer chips. While the team etched the chip using the same extreme ultraviolet lithography (EUV) used for the breakthrough 7nm chip, it ditched the common FinFET (fin field effect) transistor design in favor of stacks of silicon nanosheets. The switch makes it possible to fine-tune individual circuits to maximize their performance as they’re crammed into an incredibly small space. How small? At 5nm, the group says it can squeeze 30 billion transistors into a chip the size of a fingernail (see below) — not bad when the 7nm chip held 20 billion transistors a couple of years ago.

IBM sees the technique helping its own cognitive computing efforts as well as the Internet of Things and other “data-intensive” tasks. However, it’s also painting a rosy picture for the future of mobile devices — it imagines phones having “two to three times” more battery life than current devices. That’s likely optimistic (phone makers tend to focus on speed over longevity), but it won’t be shocking if future hardware is both faster and wrings out a little more from every charge.

Just don’t expect to see real-world examples of this for a while. We haven’t even seen devices shipping with 7nm chips (they’re not expected until 2018 at the earliest), so it could easily be a couple of years or more before 5nm arrives. Still, that 5nm is even on the roadmap is important. Chip designers won’t have to reinvent the wheel to get meaningful improvements, and you won’t have to worry about device performance growing stale for at least the next few years.

It’s durable, exponentially scalable, and it’ll last millennia, if not millions of years.

Microsoft Research has published a technical paper reviewing their work with near-eye displays for virtual and augmented reality to project phase-only holograms.

The team built a holographic projector that displayed a series of sub-holograms, which allowed the hologram to display variable depths of focused light. The projector was then combined with a series of eyepieces to achieve the displays.

Continue reading “Microsoft Demonstrates Holograms with Phase-Only Displays” »

IBM, in partnership with Samsung and GlobalFoundries (which manufactures chips for Qualcomm and AMD, among others), has developed a process for building 5nm chips. Two years ago IBM unveiled a 7nm process, and Samsung will likely ship 7nm chips next year, but today’s announcement sounds like an even more important breakthrough in chip design.

Today, Apple announced a brand-new tier of its all-in-one desktop called the iMac Pro. The new product, unveiled onstage at the company’s Worldwide Developers Conference in San Jose, California, is supposed to be a “the most powerful Mac ever,” according to the company. In other words, this computer is going to replace the painfully outdated and woefully mismanaged Mac Pro line, at least for the foreseeable future. The iMac Pro will start shipping this December starting at $4,999, Apple confirmed.

Apple says the computer will ship with an 8-core Xeon processor, with configurations that scale up to an 18-core Xeon processor, 5K display, and an all-new AMD Radeon Vega GPU. You’ll also be able to shell out for up to 16GB of VRAM, up to 128GB of data corruption-protecting ECC RAM, and up to 4TB for SSD storage. There’s a whole bunch of other upgrades in there. Check out the full list Apple shared in its presentation below:

IBM, its Research Alliance partners Globalfoundries and Samsung, and equipment suppliers have developed an industry-first process to build silicon nanosheet transistors that will enable 5 nanometer (nm) chips. The details of the process will be presented at the 2017 Symposia on VLSI Technology and Circuits conference in Kyoto, Japan. In less than two years since developing a 7nm test node chip with 20 billion transistors, scientists have paved the way for 30 billion switches on a fingernail-sized chip.

The resulting increase in performance will help accelerate cognitive computing, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud. The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged.

Scientists working as part of the IBM-led Research Alliance at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering’s NanoTech Complex in Albany, NY achieved the breakthrough by using stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture, which is the blueprint for the semiconductor industry up through 7nm node technology.

A study by neuroscientists at Toronto-based Baycrest Rotman Research Institute and Stanford University involving playing a musical instrument suggests ways to improve brain rehabilitation methods.

In the study, published in the Journal of Neuroscience on May 24, 2017, the researchers asked young adults to listen to sounds from an unfamiliar musical instrument (a Tibetan singing bowl). Half of the subjects (the experimental group) were then asked to recreate the same sounds and rhythm by striking the bowl; the other half (the control group) were instead asked to recreate the sound by simply pressing a key on a computer keypad.

Continue reading “Playing a musical instrument could help restore brain health, research suggests” »

A mantra of these data-rife times is that within the vast and growing volumes of diverse data types, such as sensor feeds, economic indicators, and scientific and environmental measurements, are dots of significance that can tell important stories, if only those dots could be identified and connected in authentically meaningful ways. Getting good at that exercise of data synthesis and interpretation ought to open new, quicker routes to identifying threats, tracking disease outbreaks, and otherwise answering questions and solving problems that previously were intractable.

Now for a reality check. “Today’s hardware is ill-suited to handle such data challenges, and these challenges are only going to get harder as the amount of data continues to grow exponentially,” said Trung Tran, a program manager in DARPA’s Microsystems Technology Office (MTO). To take on that technology shortfall, MTO last summer unveiled its Hierarchical Identify Verify Exploit (HIVE) program, which has now signed on five performers to carry out HIVE’s mandate: to develop a powerful new data-handling and computing platform specialized for analyzing and interpreting huge amounts of data with unprecedented deftness. “It will be a privilege to work with this innovative team of performers to develop a new category of server processors specifically designed to handle the data workloads of today and tomorrow,” said Tran, who is overseeing HIVE.

The quintet of performers includes a mix of large commercial electronics firms, a national laboratory, a university, and a veteran defense-industry company: Intel Corporation (Santa Clara, California), Qualcomm Intelligent Solutions (San Diego, California), Pacific Northwest National Laboratory (Richland, Washington), Georgia Tech (Atlanta, Georgia), and Northrop Grumman (Falls Church, Virginia).

The smallest and most advanced chips currently commercially available are made up of transistors with gates about 10 nm long, but IBM has now unveiled plans to cut them in half. To create 5 nm chips, the company is ditching the standard FinFET architecture in favor of a new structure built with a stack of four nanosheets, allowing some 30 billion transistors to be packed onto a chip the size of a fingernail and promising significant gains in power and efficiency.

First coined in the 1970s, Moore’s Law was the observation that the number of transistors on a single chip would double every two years. The trend has held up pretty well ever since, but the time frame of the doubling has slowed down a little in recent years. In consumer electronics, 14 nm chips are still stock-standard, but advances from the likes of Intel and Samsung mean that 10 nm versions have started hitting the high-end market.